Field of the Invention
The disclosure generally relates to a phase detector, and more specifically, to a phase detector for use in a CDR (Clock Data Recovery) circuit.
Description of the Related Art
The purpose of designing various protocols is to transfer a set of information (data) from one place to another. Serial data communication is often used to transmit the data at a high speed. At the receiver end, the transmitted data has to be retrieved without losing its integrity with the accompanied timing information. This process is clock and data recovery.
However, conventional CDR (Clock Data Recovery) circuits usually face the following problems. First, the charge pump of the CDR circuit has an unstable output voltage, such as a triangular-waveform output voltage, and this results in more jitters in the recovered clock. Second, the recovered clock is not accurate enough due to the non-ideal clock-to-output delay occurring in a main D flip-flop of the CDR circuit. Accordingly, there is a need to design a new solution for solving the aforementioned problems in the prior art.